주요 학력
- 2017.02 한국과학기술원 전기 및 전자공학부 공학박사
- 2013.02 한국과학기술원 전기 및 전자공학부 공학석사
- 2011.02 한국과학기술원 전기 및 전자공학과 공학사 (magna cum laude)

주요 경력

- 2024.09 ~ 현재 부산대학교 전기전자공학부 반도체공학전공 부교수
- 2022.05 ~ 2024.08 Google, Silicon Digital Design Engineer
- 2021.05 ~ 2022.05 Marvell Technology, Senior Manager
- 2020.04 ~ 2021.04 Marvell Technology, Senior Staff Engineer
- 2018.09 ~ 2020.03 Marvell Technology, Staff Engineer
- 2017.02 ~ 2018.08 SK 하이닉스, 책임연구원

대표 논문
1. Injae Yoo and In-Cheol Park, "Low-Power LDPC-CC Decoding Architecture Based on Integration of Memory Banks," IEEE Transactions on Circuits and Systems II: Express Briefs, Sep. 2017.
2. Injae Yoo, Bongjin Kim, and In-Cheol Park, "Reverse Rate Matching for Low-Power LTE-Advanced Turbo Decoders," IEEE Transactions on Circuits and Systems I: Regular Papers, Dec. 2015.
3. Injae Yoo, Bongjin Kim, and In-Cheol Park, "Tail-Overlapped SISO Decoding for High-Throughput LTE-Advanced Turbo Decoders," IEEE Transactions on Circuits and Systems I: Regular Papers, Sep. 2014.
4. Injae Yoo, Bongjin Kim, and In-Cheol Park, "Immediate Exchange of Extrinsic Information for High-Throughput Turbo Decoding," IEEE Communications Letters, Dec. 2012.
5. Youngjoo Lee, Hoyoung Yoo, Injae Yoo, and In-Cheol Park, “6.4Gb/s Multi-Threaded BCH Encoder and Decoder for Multi-Channel SSD Controllers,” in Proc. 2012 IEEE International Solid-State Circuits Conference (ISSCC 2012), Feb. 2012.