이재현 사진
이재현
직위(직급)
조교수
전화번호
051-510-2391
이메일
jaehyun.lee@pusan.ac.kr
사이트
https://sites.google.com/view/sdmlab
연구분야
반도체 시뮬레이션 (TCAD)
사무실
생물관 213-1호

주요 학력
학사 2006.02 한국과학기술원 전자통신공학 공학사
석사 2008.08 한국과학기술원 전자통신공학 공학석사
박사 2016.08 한국과학기술원 전자공학 공학박사

 

산업체 및 교육기관 주요경력
1. 
한국전자통신연구원 바이오센서팀 2006.09 - 2008.07 위촉연구원
2. 
SK Hynix 모바일 소자팀 2008.08 - 2012.04 선임
3. University of Glasgow, Device Modelling Group 2016.09 - 2018.10 Research Associate

4. Synopsys Inc., Glasgow, UK 2018.11 - 2023.08 Senior R&D Engineer II
5. 
부산대학교 공과대학 전자공학과 2023.09 - 현재 조교수

 

교육 및 학회 봉사 활동

1. Journal Reviewer

IEEE Electron Device Letters

IEEE Transactions on Electron Devices

IEEE Transactions on Nanotechnology

IEEE Journal of the Electron Devices Society

Scientific Reports

Journal of Computational Electronics

Advances in Science, Technology and Engineering Systems Journal

Discover Nano

 

대표 논문

1. Jaehyun Lee, et. al, “A Worst-Case Analysis of Trap-Assisted Tunneling Leakage in DRAM Using a Machine Learning Approach”, IEEE Electron Device Lett., 42, 2, pp. 156 (2021) DOI: 10.1109/LED.2020.3046914

2. Jaehyun Lee, et. al, “Understanding Electromigration in Cu-CNT Composite Interconnects: A Multiscale Electro-Thermal Simulation Study”, IEEE Transactions on Electron Devices, 65, 9, pp. 3884 (2018) DOI: 10.1109/TED.2018.2853550

3. Jaehyun Lee, et. al, “A theoretical model for predicting Schottky-barrier height of the nanostructured silicide-silicon junction”, Applied Physics Letters, 110, 233110, (2017) DOI: 10.1063/1.4985013

4. Jaehyun Lee, et. al, “Nonorthogonal sp3d5 Tight-binding Parameterization of Phosphorene Under Biaxial Strain and Application to FETs”, Nanotechnology, 27, 24, 245202 (2016). DOI: 10.1088/0957-4484/27/24/245202

5. Jaehyun Lee and Mincheol Shin, “Performance Assessment of III-V Channel Ultra-thin-body Schottky-Barrier MOSFETs”, IEEE Electron Device Letters, 35, 7, pp. 726 (2014) DOI: 10.1109/LED.2014.2322370

 

대표 특허

1. Jaehyun Lee, et. al, “Dynamic Random-Access Memory Pass Transistors With Statistical Variations in Leakage Currents”, US 11,494,539 B2/KR 10-2022-0139904/TW202133175A/CN115136240A, Date of Patent: 8th Nov. 2022 (US), Date of Publication: 17th. Oct. 2022 (KR), 1st Sep. 2021 (TW), 30th Sep. 2022 (CN)

2. Jaehyun Lee, et. al, “Method for Simulating Characteristics of Semiconductor Device”, US 11,010,524 B2/KR 10-1880192, Date of Patent: 13th July 2018 (KR), 18th May 2021 (US)

3. Jaehyun Lee, et. al, “High Power Spin Torque Oscillator Integrated on a Transistor”, US 9,369,086 B2/ KR 10-1695468, Date of Patent: 5th Jan. 2017 (KR), 14th Jun. 2016 (US)

 

수상 및 포상 내역

1. Cover Page 선정, IEEE Electron Device Lett., February 2021

2. Best Poster Award, SISPAD 2016 (Int’l Conference), Germany

3. 최우수상 (한국과학기술정보연구원장상) 제 2회 첨단 사이언스 교육 허브 개발 경진대회 나노 물리 분야

4. 우수 개선제안, 2011 Mobile Innovation Festival, SK Hynix

5. KBS Quiz Korea 이공계 장학금 2007